//CWE-1298 Consider the example Locked_override_register example. 
/*
The code below shows a 2x1 multiplexor using logic gates. 
Though the code shown below results in the minimum gate solution, it is disjoint and causes glitches.
*/
// 2x1 Multiplexor using logic-gates
module glitchEx(
input wire in0, in1, sel,
output wire z
);
wire not_sel;
wire and_out1, and_out2;
assign not_sel = ~sel;
assign and_out1 = not_sel & in0;
assign and_out2 = sel & in1;
// The buggy line of code, commented above, results in signal 'z' periodically changing to an unwanted state. Thus, any logic that references signal 'z' may access it at a time when it is in this unwanted state. This line should be replaced with the line shown below in the Good Code Snippet which results in signal 'z' remaining in a continuous, known, state. Reference for the above code, along with waveforms for simulation can be found in the references below.
//assign z = and_out1 | and_out2; // glitch in signal z
assign z = and_out1 | and_out2 | (in0 & in1);
always @(*) begin
    if(in0 && in1) assert (z==1);
end
endmodule